Mixed Signal Design Group at Georgia Tech

M. Swaminathan, “Low Cost Electronic Packaging Research Center at Georgia Tech” , Invited seminar sponsored by the Oregon Center for Advanced Technology and Education, Beaverton, Oregon, Feb. 17, 1995.
M. Swaminathan, “Challenges in Testing Unpopulated MCM Substrates” , IEEE/APS Chapter, Atlanta, Georgia, Oct. 26, 1995.
M. Swaminathan, “Engineering Research Center at Georgia Tech” , Invited seminar, David Sarnoff Research Center, Princeton, New Jersey, May 1995.
M. Swaminathan, “Electrical Issues in Package Design” , Solid State Physics Laboratory, New Delhi, India, Dec. 19, 1996.
M. Swaminathan, “Modeling of Structures Arising in Next Generation Packaging” , Invited Seminar, Asia Pacific Microwave Conference, New Delhi, India, Dec. 17-20, 1996.
M. Swaminathan, “VSPA - A Novel Packaging Technology” , Invited Seminar, Sponsored by The Panda Project, San Jose, California, Sept. 1997.
M. Swaminathan, “Electronic Technological Trends Causing a Revolution in Connector Design”, Invited Seminar, Fleck Connector Congress, Palm Springs, California, Sept. 1997.
M. Swaminathan, “Challenges in the Design of Next Generation Mixed Signal Packages” , Invited Seminar, Second International Symposium on Emerging Microelectronics and Interconnection Technology, Bangalore, India, Feb. 1998.
M. Swaminathan, “Electrical Design of High Performance Digital Packages”, Invited Short Course, IEEE Electronic Packaging and Technology Conference, Singapore, Dec. 8, 1998.
M. Swaminathan, “CAD Methods for Designing Next Generation Gigahertz Packages”, Invited Seminar, Korea Advanced Institute for Science and Technology (KAIST), South Korea, June 29, 1999.
M. Swaminathan, “CAD Methods for Designing Next Generation Gigahertz Packages”, Invited Seminar, National University of Singapore, Singapore, July 1, 1999.
M. Swaminathan, “Design Challenges for Next Generation Packaging”, Invited Seminar, Electronic Packaging Forum, Institute of Microelectronics, Singapore, July 2, 1999.
M. Swaminathan and Rao Tummala, “SOC and SOP: The Best of Both”, Plenary Talk, International Conference on Solid State Devices and Materials, Sendai, Japan, Aug. 28, 2000.
M. Swaminathan, “Enabling Reliable Systems Through Ground Bounce Predictions”, Invited Seminar, University of Illinois at Urbana Champaign, Urbana Champaign, Mar. 6, 2001.
M. Swaminathan, “Interconnect Modeling and Characterization Techniques for Mixed Signal Designs”, Invited Seminar, Analog Devices, Boston, Massachusetts, Mar. 8, 2001.
M. Swaminathan, “Enabling Reliable Systems Through Ground Bounce Predictions”, Invited Seminar, Arizona State University, Phoenix, Arizona, Mar. 27, 2001.
M. Swaminathan, “Enabling Reliable Systems Through Ground Bounce Predictions”, Invited Talk, International Mixed Signal Technology Workshop, Lake Lanier, Georgia, June 2001.
M. Swaminathan, V. Sundaram, S. Dalmia, J. M. Hobbs, G. E. White, S. Bhattacharya and R. Tummala, “Recent Advances in SOP Integration”, Invited Talk, International Conference on Solid State Devices and Materials, Tokyo, Japan, Sept. 26, 2001.
M. Swaminathan, “System-on-a-Package Technologies for Enabling Future Microsystems”, Keynote Talk, Signal Propagation on Interconnects Workshop, Pisa, Italy, May 2002.
M. Swaminathan, Electrical design of Integral Passive Devices and Modules”, Keynote Talk, Industrial Technology and Research Institute (ITRI), Hsinchu, Taiwan, Dec. 2, 2002.
M. Swaminathan, R. R. Tummala, V. Sundaram, F. Liu, S. Dalmia, J. Hobbs, E. Matoglu, G. White, J. Laskar and N. Jokerst, Keynote Talk, “Status and Challenges in SOC, SIP and SOP Emerging Technologies”, Keynote Talk, Semicon, Tokyo, Japan, Dec. 6, 2002.
M. Swaminathan and Abhijit Chatterjee, “Macro-modeling and Reduced Order Modeling Methods for Mixed Signal Systems”, Invited Talk, ACES, Monterey, CA, Feb. 24, 2003.
M. Swaminathan, “Packaging and Integration of Mixed Signal Systems using Organics – A Designer’s Perspective”, Invited Seminar, IEEE CPMT Phoenix Chapter, Sep. 3, 2003.
M. Swaminathan, “Modeling of Switching Noise in Modern CMOS Systems – A System’s Perspective”, Invited Seminar, Intel, Sep. 5, 2003.
M. Swaminathan, “Design of Mixed Signal Systems with Intgerated Digital and RF Functions”. Invited Seminar, Samsung Electronics, Nov. 6, 2003.
M. Swaminathan, “Modeling of Switching Noise in Modern CMOS Systems – A System’s Perspective”, Invited Seminar, Electrical Design and Packaging of Systems (EDAPS), Nov. 10, 2003.
M. Swaminathan and J. Mao, “Modeling of Chip and Package Power Distribution Networks for Gigascale Integration”, Plenary Session, Progress in Electromagnetics Research Symposium, Pisa, Italy, Mar. 2004.
M. Swaminathan, “Design Tools for Power Analysis and Chip-Package Co-Design in Intgerated Microsystems”, Invited Speaker at Design Automation Seminar Series, T. J. Watson Research Center, IBM, Jan. 2005.
M. Swaminathan, “Is the Electronics Industry Ready for the Next Electronics Revolutions and can Academia Help ?”, Keynote Talk, IEEE Workshop on Electrical Design of Advanced Packaging and Systems, Dec. 2006.
M. Swaminathan, “System on Package”, Keynote Talk, European Systems Packaging Workshop, Como, Italy, Jan. 2007.
M. Swaminathan, “RF System on Package”, Invited Speaker, IEEE CPMT Society Distinguished Lecture, I-Shou University, S. Korea, Dec. 2007.
Madhavan Swaminathan, "System on Package (SoP)- A Platform for Micro, Nano and Bio Convergence", Invited Speaker, Cross Layer Workshop, Design Automation Conference, San Francisco, June 2008
Madhavan Swaminathan, "Education Program on Electronic System Packaging", Panelist, IEEE Signal Propagation on Interconnects, Avignon, France, May 13, 2008
Madhavan Swaminathan, "Challenges and Opportunities in 3D Heterogeneous System Integration", Invited Speaker, IBM Yorktown Heights, IBM, NY, Nov 2008.
Madhavan Swaminathan, "Challenges and Opportunities in 3D Heterogeneous System Integration", Invited Speaker, National Taiwan University, Taipei, Taiwan, Dec 2008.